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����H������H�����H���H�=H�������B��I��H=�vA�ą����B�@D��rH������rH���A����y��pH��?H��H���H���H��uH����B��h���H���H��uH���H�����L����A��1�L�������pH���H��0H��uH����D;�psH��0Ic�1�A��H���⋳hE1�1�1�H���H��8H��uH���H��0��]��h���H��@H��H��u��hH���H����"��h��H���H���A�ą��J�%A��J��;	I��0�I��u����H�H�H��tnH�D$ H�|$ 1�H�t$ D�'�A��0t��uH��A�������Ƌ�PH��H�����u�H�D$ �8,uH��H�D$ H�D$ �8u�D��H�=1�1�H��	�A�ą�u}H�H���H��t2H���w)I�H��H���H��`H��t�H����fH=�v^H��A���H�=���tH����d�������I����҃�I������1���H�D$(eH+%(t�H��0D��[]A\A]A^A_�3[nandsim] error: get_state_by_command: unknown command, BUG
3[nandsim] error: get_state_name: unknown state, BUG
3[nandsim] error: BCH not available on small page devices
3[nandsim] error: Invalid BCH value %u
6[nandsim] Using %u-bit/%u bytes BCH ECC
[nandsim] debug: switch_to_ready_state: switch to %s state
4[nandsim] warning: simulating read error in page %u
Total numbers of erases:  %lu
Average number of erases: %lu
Maximum number of erases: %lu
Minimum number of erases: %lu
Number of ebs with erase counts from %lu to %lu : %lu
drivers/mtd/nand/raw/nandsim.c3[nandsim] error: wrong bus width (%d), use only 8 or 16
3[nandsim] error: unable to allocate core structures.
3[nandsim] error: bbt has to be 0..2
3[nandsim] error: invalid weakblocks.
3[nandsim] error: unable to allocate memory.
3[nandsim] error: invalid weakpages.
3[nandsim] error: invalid gravepagess.
3[nandsim] error: Could not scan NAND Simulator device
3[nandsim] error: overridesize is too big
3[nandsim] error: Too many erase blocks for wear reporting
3[nandsim] error: init_nandsim: nandsim is already initialized
3[nandsim] error: init_nandsim: unknown page size %u
3[nandsim] error: too many partitions.
3[nandsim] error: bad partition size.
4[nandsim] warning: 16-bit flashes support wasn't tested
flash size with OOB: %llu KiB
3[nandsim] error: alloc_device: cache file not readable
3[nandsim] error: alloc_device: cache file not writeable
3[nandsim] error: alloc_device: unable to allocate pages written array
3[nandsim] error: alloc_device: unable to allocate file buf
3[nandsim] error: alloc_device: unable to allocate page array
3[nandsim] error: cache_create: unable to create kmem_cache
3[nandsim] error: init_nandsim: unable to allocate %u bytes for the internal buffer
3[nandsim] error: invalid badblocks.
4[nandsim] warning: CONFIG_MTD_PARTITIONED_MASTER must be enabled to expose debugfs stuff
3[nandsim] error: cannot create "nandsim_wear_report" debugfs entry
4[nandsim] warning: read_page: flipping bit %d in page %d reading from %d ecc: corrected=%u failed=%u
4[nandsim] warning: do_state_action: wrong page number (%#x)
3[nandsim] error: do_state_action: column number is too large
[nandsim] debug: read_page: page %d not written
[nandsim] debug: read_page: page %d written, reading from %d
3[nandsim] error: read_page: read error for page %d ret %ld
[nandsim] debug: read_page: page %d not allocated
[nandsim] debug: read_page: page %d allocated, reading from %d
[nandsim] debug: do_state_action: (ACTION_CPY:) copy %d bytes to int buf, raw offset %d
[nandsim] log: read page %d (second half)
[nandsim] log: read OOB of page %d
3[nandsim] error: do_state_action: device is write-protected, ignore sector erase
3[nandsim] error: do_state_action: wrong sector address (%#x)
[nandsim] debug: do_state_action: erase sector at address %#x, off = %d
[nandsim] log: erase sector %u
[nandsim] debug: erase_sector: freeing page %d
3[nandsim] error: Erase counter total overflow
3[nandsim] error: Erase counter overflow for erase block %u
4[nandsim] warning: simulating erase failure in erase block %u
4[nandsim] warning: do_state_action: device is write-protected, programm
3[nandsim] error: do_state_action: too few bytes were input (%d instead of %d)
[nandsim] debug: prog_page: writing page %d
3[nandsim] error: prog_page: read error for page %d ret %ld
3[nandsim] error: prog_page: write error for page %d ret %ld
[nandsim] debug: prog_page: allocating page %d
3[nandsim] error: prog_page: error allocating memory for page %d
[nandsim] debug: do_state_action: copy %d bytes from int buf to (%#x, %#x), raw off = %d
[nandsim] log: programm page %d
4[nandsim] warning: simulating write failure in page %u
[nandsim] debug: do_state_action: set internal offset to 0
3[nandsim] error: do_state_action: BUG! can't skip half of page for non-512byte page size 8x chips
[nandsim] debug: do_state_action: set internal offset to %d
[nandsim] debug: do_state_action: BUG! unknown action
[nandsim] debug: find_operation: operation found, index: %d, state: %s, nxstate %s
[nandsim] debug: find_operation: no operation found, try again with state %s
[nandsim] debug: find_operation: no operations found
[nandsim] debug: find_operation: BUG, operation must be known if address is input
[nandsim] debug: find_operation: there is still ambiguity
[nandsim] debug: switch_state: operation is known, switch to the next state, state: %s, nxstate: %s
[nandsim] debug: switch_state: operation is unknown, try to find it
[nandsim] debug: switch_state: double the column number for 16x device
4[nandsim] warning: switch_state: not all bytes were processed, %d left
[nandsim] debug: switch_state: operation complete, switch to STATE_READY state
[nandsim] debug: switch_state: the next state is data I/O, switch, state: %s, nxstate: %s
3[nandsim] error: switch_state: BUG! unknown data state
3[nandsim] error: switch_state: BUG! unknown address state
3[nandsim] error: write_byte: chip is disabled, ignore write
3[nandsim] error: write_byte: ALE and CLE pins are high simultaneously, ignore write
3[nandsim] error: write_byte: unknown command %#x
4[nandsim] warning: write_byte: command (%#x) wasn't expected, expected state is %s, ignore previous states
[nandsim] debug: command byte corresponding to %s state accepted
[nandsim] debug: write_byte: operation isn't known yet, identify it
3[nandsim] error: write_byte: address (%#x) isn't expected, expected state is %s, switch to STATE_READY
3[nandsim] error: write_byte: no more address bytes expected
[nandsim] debug: write_byte: address byte %#x was accepted (%d bytes input, %d expected)
[nandsim] debug: address (%#x, %#x) is accepted
3[nandsim] error: write_byte: data input (%#x) isn't expected, state is %s, switch to %s
4[nandsim] warning: write_byte: %u input bytes has already been accepted, ignore write
3[nandsim] error: read_buf: chip is disabled
3[nandsim] error: read_buf: ALE or CLE pin is high
4[nandsim] warning: read_buf: unexpected data output cycle, current state is %s
3[nandsim] error: read_byte: chip is disabled, return %#x
3[nandsim] error: read_byte: ALE or CLE pin is high, return %#x
4[nandsim] warning: read_byte: unexpected data output cycle, state is %s return %#x
[nandsim] debug: read_byte: return %#x status
4[nandsim] warning: read_byte: no more data to output, return %#x
[nandsim] debug: read_byte: read ID byte %d, total = %d
[nandsim] debug: read_byte: all bytes were read
3[nandsim] error: read_buf: too many bytes to read
3[nandsim] error: write_buf: data input isn't expected, state is %s, switch to STATE_READY
3[nandsim] error: write_buf: too many input bytes
[nandsim] debug: write_buf: %d bytes were written
 debug: write_buf: %d bytes were written
 debug: address (%#x, %#x) is accepted
 debug: write_byte: address byte %#x was accepted (%d bytes input, %d expected)
 debug: write_byte: operation isn't known yet, identify it
 debug: command byte corresponding to %s state accepted
 debug: read_byte: all bytes were read
 debug: read_byte: read ID byte %d, total = %d
 debug: read_byte: return %#x status
 debug: switch_state: the next state is data I/O, switch, state: %s, nxstate: %s
 debug: switch_state: operation complete, switch to STATE_READY state
 debug: switch_state: double the column number for 16x device
 debug: switch_state: operation is unknown, try to find it
 debug: switch_state: operation is known, switch to the next state, state: %s, nxstate: %s
 debug: do_state_action: BUG! unknown action
 debug: do_state_action: set internal offset to %d
 debug: do_state_action: set internal offset to 0
 debug: do_state_action: copy %d bytes from int buf to (%#x, %#x), raw off = %d
 debug: do_state_action: erase sector at address %#x, off = %d
 log: read page %d (second half)
 debug: do_state_action: (ACTION_CPY:) copy %d bytes to int buf, raw offset %d
 debug: prog_page: allocating page %d
 debug: prog_page: writing page %d
 debug: erase_sector: freeing page %d
 debug: read_page: page %d allocated, reading from %d
 debug: read_page: page %d not allocated
 debug: read_page: page %d written, reading from %d
 debug: read_page: page %d not written
 debug: find_operation: there is still ambiguity
 debug: find_operation: BUG, operation must be known if address is input
 debug: find_operation: no operations found
 debug: find_operation: no operation found, try again with state %s
 debug: find_operation: operation found, index: %d, state: %s, nxstate %s
 debug: switch_to_ready_state: switch to %s state
STATE_READYSTATE_CMD_READ1STATE_CMD_ERASE2STATE_CMD_READOOBSTATE_CMD_READSTARTSTATE_CMD_ERASE1STATE_CMD_STATUSSTATE_CMD_SEQINSTATE_CMD_READIDSTATE_CMD_PAGEPROGSTATE_CMD_RESETSTATE_CMD_RNDOUTSTATE_CMD_RNDOUTSTARTSTATE_ADDR_PAGESTATE_ADDR_SECSTATE_ADDR_ZEROSTATE_ADDR_COLUMNSTATE_DATAINSTATE_DATAOUTSTATE_DATAOUT_IDSTATE_DATAOUT_STATUSSTATE_CMD_READ0STATE_UNKNOWNNumber of erase blocks:   %u
&nfc->lockNAND simulator partition %dflash size: %llu MiB
page size: %u bytes
OOB area size: %u bytes
sector size: %u KiB
pages number: %u
pages per sector: %u
bus width: %u
bits in sector size: %u
bits in page size: %u
bits in OOB size: %u
page address bytes: %u
sector address bytes: %u
options: %#x
nandsimnandsim_wear_report[nandsim] log: read page %d
[nandsim] log: reset chip
 log: reset chip
 log: programm page %d
 log: erase sector %u
 log: read OOB of page %d
 log: read page %d
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